Zilog

Z86C3616PSG

Features

28-Pin DIP, 28-Pin SOIC and PLCC Packages (C34, C35, C36)
40-Pin DIP, 44-Pin PLCC and QFP Packages (C44, C45, C46)
3.0- to 5.5-Voltage Range
Clock Free Watch-Dog Timer (WDT) Reset
Expanded Register File (ERF)
Full-Duplex UART (ASCI)
Dedicated 16-Bit Baud Rate Generator
24 Input/Output Lines (C34/C35/C36)
Two Analog Comparators
Two Programmable 8-Bit Counter/Timers, Each with Two 6-Bit Programmable Prescaler
RAM and ROM Protect
Optional 32-kHz Oscillator

Related Links
• Documentation	• Samples

Parts

Part Number	Package	Status
Z86C3616PSG		EOL

Part Number	Package	Status
Z86C3616SSG		EOL

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