• 64-Pin VQFP Package
  • 16-Bit x 16-Bit Multiplier
  • 32-Bit/ 16-Bit Divider
  • Three 16-Bit Counter/Timers
  • Search and Merge Instructions
  • Evaluation Mode, bus Request Mode
  • Up to 16 Output Address Lines Permitting an Address Space of up to 64Kbytes each of Program or Data Memory
  • 464 8-Bit Registers Organized as 444 General-Purpose Registers 16 Control and Status Registers 1 Reserved Registers, and up to 3 I/O Port Registers
  • Bus Control Signals: RD (Read Strobe), WR (Write Strobe), and ALE (Address Latch Enable)

Related Links
• Documentation • Buy Now
• Samples
Part NumberPackageStatus
Part NumberPackageStatus
The Sample Center is managed separately
from Zilog's Customer Support services,
and therefore requires a separate login.
Acknowledged! Take me to the Sample Center.
Disable this pop-up in the future.